Vectors
Formal Definition
Vectors are multiple bit widths net
or reg data type variables
that can be declared by specifying their range.
Simplified Syntax
net_type [msb:lsb] list_of_net_identifiers;
reg [msb:lsb] list_of_register_identifiers;
Description
Vector range specification contains two constant expressions: the msb
(most significant bit) constant expression, which is the lefthand
value of the range and the lsb (least significant bit) constant
expression, which is the righthand value of the range. The msb and
lsb constant expressions should be separated by a colon.
Both the msb constant expression and the lsb constant expression can
be any value  positive, negative, or zero. The lsb constant
expression can be greater, equal or less than the msb constant expression.
Vectors can be declared for all types of net
data types and for reg data
types. Specifying vectors for integer,
real, realtime,
and time data types is illegal.
Vector nets and registers are treated as unsigned values (see:
Arithmetic expressions with registers and integers for more explanations).
Examples
Example 1
reg [3:0] addr;
The 'addr' variable is a 4bit vector register made up of addr[3]
(the most significant bit), addr[2], addr[1], and addr[0] (the least
significant bit).
Example 2
wire [3:4] d;
The d variable is 8bit vector net made up of d[3] (msb), d[2],
d[1], d[0], d[1], d[2], d[3], d[4] (lsb).
Example 3
tri [5:0] x, y, z;
The above line declares three 6bit vectors.
Important Notes

Both the msb and the lsb expressions should be constant expressions.

The msb and the lsb constant expressions may be positive, negative,
or zero.

The lsb constant expression may be greater, equal or less than the
msb constant expression.

Vectors can be declared only for nets
and reg data types.

Vector declaration for integer,
real, realtime,
and time data types are illegal.
