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Intra-assignment Timing Controls

Formal Definition

The intra-assignment timing controls are procedural timing controls, which can be used inside procedural assignments.

Simplified Syntax

register = delay_control expression;

register <= delay_control expression;

register = event_control expression;

register <= event_control expression;

register = repeat (expression) @(event) expression;

register <= repeat (expression) @(event) expression;


All intra-assignment timing controls should be used with procedural assignments. They can be used with blocking and non-blocking assignments. If a statement with intra-assignment timing controls is encountered during simulation, an expression will be evaluated and its value will be stored. Then, the execution of the statement will be suspended until the time specified by the delay control expires or an event specified by the event control occurs. Changes in the expression value up to the time of the event will be ignored. Next, the stored value will be assigned to the register.




Delay with assignment

#5 a = b;

a = b;


a = #5 b;

temp = b;
a = temp;

Table 7 Differences beetwen delays and intra-assignment timing control

A delay with an assignment works differently. An assignment will be delayed and then the current value of expression will be assigned.

The repeat expression specifies how many occurrences of an event should appear before the assignment takes place (Example 3).


Example 1

r_out = #10 inputA;

This is the same as:

temp = inputA;
r_out = temp;

Example 2

q = @(posedge clk) d;

This is the same as:

temp = d;
@(posedge clk);
q = temp;

Example 3

a = repeat (5) @(ready) b & c;

This is the same as:

Temp = b & c;
a = temp;

Important Notes

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